§ Services
We help you ship the product, not just the SoM.
From the first carrier-board sketch to volume production. Most of it is free. The deep work is fixed-quote, scoped, and never has a multi-month minimum.
§ Free for every customer
Designing-in starts free.
Free schematic review
Send us your carrier-board schematic; we mark it up with an annotated PDF in under 5 working days. Power tree, MIPI routing, decoupling, boot-strap pins, bring-up sequencing — we have seen all the failure modes.
No NDA · no fee for the first round
Free pinout consultation
Pick the right SoM for your I/O budget. We run through your peripheral list against the E1M / E1M-X pad map and confirm what fits, what conflicts, and what alternates to consider.
30-minute call with a hardware engineer
Annotated PDF back in 5 working days
§ Engineering services
Fixed-quote work, scoped before you sign.
Three pre-shaped engagements covering carrier hardware, BSP, and AI bring-up. NRE only — no royalties, no per-unit fees, no multi-month retainers.
Carrier-board design
Hardware NREFull carrier from sketch to first-spin gerbers, with bring-up firmware on the Alp SDK.
- Schematic capture (Altium / KiCad)
- PCB layout + DRC clean
- SI simulation for high-speed nets — PCIe, MIPI CSI/DSI, USB 3.x
- First-article bring-up + bring-up firmware on the Alp SDK
- Typical scope: 4–8 weeks, kickoff to first-spin gerbers
- Fixed quote, NRE only · you own the schematics
BSP customization
Software NREYocto, Zephyr, or bare-metal — tailored to your peripheral set and production line.
- Yocto layer or Zephyr west manifest for your peripheral set
- Boot-time optimization — sub-2 s cold boot achievable on E1M-X
- Production-flash provisioning scripts + EEPROM identity
- Mainline kernel maintenance contract — 12 / 24 / 60-month tracks
AI model bring-up
AI / NPU NREGet your trained model onto the SoM accelerator with real latency and power numbers.
- Compile to Ethos-U / DRP-AI3 / DEEPX DX-M1 accelerators
- Quantization + INT8 calibration with your dataset
- Real-world latency + power profiling on your hardware
- Integrated through the Alp SDK <alp/inference> dispatcher
§ How the stages fit
Each stage stands alone — outputs from one feed the next.
Free schematic review
→ annotated PDF
Carrier-board design
→ first-spin gerbers
BSP customization
→ Yocto layer / west manifest
AI model bring-up
→ <alp/inference> integration
Start free. Add only the stages you need.
§ How engagements work
Four steps. No surprises.
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Step 1 of 4
1
Intro call
30 min, free. We listen, you talk, we suggest the shortest path.
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Step 2 of 4
2
Scope + fixed quote
Written quote with deliverables, milestones, IP terms. No surprises mid-project.
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Step 3 of 4
3
Build + weekly check-ins
Shared Git + Slack channel. You see commits as they happen.
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Step 4 of 4
4
Handover
Source + docs + bring-up notes. Optional sustaining contract.
§ What you keep
The IP terms, in plain English.
We do the engineering; you keep the product. No royalty surprises a year after handover.
- You own the carrier-board schematics + layout outright. We retain reusable building-block IP only.
- BSP changes that aren't proprietary to your product flow back upstream into the Alp SDK so you benefit from future fixes.
- No royalties, no per-unit fees. NRE only.
§ Track record
We've designed-in modules across rolling-stock predictive maintenance, autonomous drones, and agricultural IoT. Our customers — DelphiSonic, Mavinci, and Rhodark — built production hardware with the help of these services. References on request.
§ Start with a free review
Send the schematic. Or scope the build.
The first conversation is always free. We'll tell you whether you need an hour of our time or twelve weeks of it.