Alp SDK · v0.9.0 · released 2026-07-06

One declarative file. Heterogeneous build.

Same C/C++ API across Alif, Renesas, DeepX. Set the module SKU; the SDK produces a dual-image build for every heterogeneous SoM — Yocto on the A-cluster, Zephyr on the M-class companion, IPC stitched in. It runs on every E1M edge AI module and implements the open E1M standard.

v0.9 status: silicon evidence on two SoM families. The E1M-X V2N bench verified the GD32 supervisor-bridge stack end-to-end (functional 26/26, 20-row HIL soak 253/253, A/B OTA, wire protocol v0.7), and the E1M-AEN801 (Alif Ensemble E8) ran an on-silicon bench campaign — 15/17 peripheral apps PASS, NPU inference from MRAM, dual-core RPC, and SE-crypto all RESULT PASS. The remaining families (i.MX 93, V2M/DEEPX, and AEN30x–70x) stay [UNTESTED] on real hardware — budget your own bring-up time until the v1.0 sweep.

View on GitHub ↗Full docs ↗Community ↗

§ One file, every module

The same board.yaml drives every E1M build.

One declarative config. Swap the module SKU and the build target re-routes — same C/C++ API on the other side. No per-module forks, no parallel BSP trees.

→ Single schema across Alif, Renesas, DeepX
→ Per-core cores.<id> scoping — apps + peripherals inline
→ Silicon facts live in the SoM preset, not your project
→ Pin routing in SoM + carrier preset YAML — apps use E1M_<NAME> aliases
→ Build, flash, debug — three commands

Click the card to pause.

west · zsh3 commands

$ alp build --som E1M-V2N101
  → resolving E1M-X V2N preset · ok
  → building a55_cluster (yocto) · 4m 12 s
  → building m33_sm     (zephyr) · 8 s

$ alp flash --usb
  → device: E1M-X V2N (s/n a3-12)
  → rootfs + m33 image · 100% (38 s)

$ alp monitor --port /dev/ttyUSB0
  → a55_cluster boot banner · console live

board.yamlalp-sdk · v0.9.0

# One declarative file. Heterogeneous build.
som:
  sku:    E1M-V2N101
  hw_rev: r1

preset:   e1m-x-evk

cores:
  a55_cluster:
    app:          ./linux
    image:        alp-image-edge
    peripherals:  [ethernet, usb, emmc]
    libraries:    [mbedtls, nlohmann_json]
    iot:          { wifi: true, mqtt: true }
  m33_sm:
    app:          ./m33
    peripherals:  [adc, pwm, i2c, gpio]
    libraries:    [cmsis_dsp]

ipc:
  - kind:         rpmsg
    endpoints:    [a55_cluster, m33_sm]
    carve_out_kb: 512

diagnostics:
  log_level:      info

# run via the alp CLI front door:
build:   alp build    --som E1M-V2N101
flash:   alp flash    --usb
reflash: alp flash    --core a55_cluster

running onE1M-X V2N·4 TOPS

See all 6 modules ↗

§ The Alp SDK stack

Write once, run on any E1M module.

Alp SDK is the unification software layer for Alp Lab edge AI modules. A single C/C++ API works across every E1M SoM — present and future — wrapping each vendor's SDK on top of the chosen OS (Zephyr / Yocto / bare-metal). Single-OS or heterogeneous, the application surface stays identical.

AI Framework

On-device inference

On-device runtimes

TFLM → Ethos-U Alif AEN (U55 all E3..E8; U85 on E4/E6/E8 — Transformer)TFLM → Ethos-U NXP N93 (U65)TFLM → DRP-AI3 (Renesas V2N)TFLM → DEEPX DX-M1 (V2M family)TFLM → CPU reference kernels

Model families

classificationdetection (YOLOv5/v8 on DEEPX + DRP-AI3)segmentationkeyword-spottingpose

Offline training only

TensorFlowPyTorch

trained model → deployable inference

Dev Tooling

Build, orchestrate, flash

v0.9.0

board.yaml v2alp CLI (build · run · flash · emit)alp doctor (host preflight)alp monitor (serial console)alp new-som (porting kit)alp_orchestrate.py (fan-out + system-manifest)alp_project.py (per-core emit)portable-API conformance suiteVS Code extensionprogram_eeprom.pyper-OS dependency bootstrap

board.yaml → per-core build + flash

Alp SDK

One unified <alp/*.h> API

Peripherals

GPIO / I²C / SPIUART / PWM / ADCCAN / RTC / WDT / USB

Audio

PDM in (mics)I²S out + ampTAS2563

Camera

OV5640CAM_MUX

Inference

dispatcherEthos-U / DRP-AIDEEPX / CPU

IoT / BLE

Wi-Fi 6MQTTBLE 5.4

Security

MbedTLSPSA CryptoOPTIGA TM

Display / GUI

SSD1306 / 1331LVGLGPU2D / Dave2D

HW Info

EEPROM manifest (authoritative)hw_rev + serial<alp/hw_info>

DSP / Power

alp_dsp_* chain (FFT, FAC, IIR)<alp/power.h>

Heterogeneous IPC (v0.6 NEW)

<alp/rpc.h> framed RPMsg over OpenAMP<alp/system_ipc.h> auto-generated endpoint IDs<alp/mproc.h> mailbox · shared mem · hwsem

80 Tier-1 chip drivers + Tier-2 community

lsm6dsobmi323bmp581icm42670ina236tmp112tcal9538rv3028c724c128cc3501essd13xx…

User libraries (board.yaml libraries:)

ETLfmtnlohmann_jsondoctestLVGLMbedTLSCMSIS-DSPLittleFS

<alp/*.h> calls · RPMsg IPC bridges M-class ↔ A-class

Operating System

Per-core slice (cores: in board.yaml) · heterogeneous = peers on same SoM

Zephyr · M-class cores

Yocto · A-class cores

Bare-metal · no-RTOS

Bare-metal

per-core OS slice

Vendor SDK

We wrap each one

Alif Ensemble (AEN)Renesas RZ/V2NNXP i.MX 93DEEPX DX-M1

wrapped vendor HAL

Hardware + HAL

E1M open-standard form factor

E1M (35×35 mm) SoMsE1M-X (45×65 mm) SoMsE1M-EVK carrierE1M-X-EVK carriervendor HALs

Standalone firmware against <alp/...> headers, or alp-studio codegen — same API surface either way.

§ Release notes

What just shipped.

Alp SDK ships in monthly cuts. Each release is signed, tagged on GitHub, and documented with a migration note if anything moves.

Full changelog on GitHub ↗

v1.0after first pilotPlanned
Silicon-verified release · ABI freeze
- HiL bring-up sweep across AEN + V2N101 + V2M101
- ABI snapshot frozen — backwards-compat guarantee
- Concurrent multi-NPU (DRP-AI3 + DEEPX) proven on V2M101
- Mender OTA E2E on V2N101 fleet of N ≥ 3 boards
- 4 vertical reference apps end-to-end verified
v0.9.02026-07-06 · releasedShipped
Portable-surface consistency · the alp CLI single front door
- alp CLI is now the single front door — build · run · flash · emit · doctor · monitor beside init/validate/model, plus a Windows-native bootstrap.ps1
- <alp/version.h> [ABI-STABLE]: compile-time version + ABI feature-test macros (ALP_VERSION_AT_LEAST) and a runtime alp_version_string()
- SE-backed portable surfaces: SoC identity (<alp/hw_info.h>), power profiles (<alp/power.h>), peer-core boot (<alp/mproc.h>) — Alif SE backends registered per silicon; SE round-trips still bench-gated
- I²C/SPI target (slave) mode + alp_init()/alp_deinit() lifecycle in <alp/peripheral.h>; the i2c/spi-slave examples now run the real API
- Portable-API conformance suite: 13 classes × 8 contract cases on native_sim — the porting gate for every new SoM backend
- AEN401 (E4) USB host + AEN601 (E6) board wrappers land compile-verified — live bring-up bench-gated
- Studio carrier-netlist handoff: alp emit carrier-netlist writes a schema-versioned netlist/BOM JSON (no KiCad/Gerber/DRC claims)
- 8 new edge-AI examples (cold-chain, visual-defect, motor-current, wearable fall, rail PdM, acoustic safety/anomaly, multimodal fusion) — cores host-tested, models stubbed, HiL-gated
- Persistent <alp/update_log.h> tier over Zephyr NVS — tamper-evident audit chain survives reboot + firmware update
- Pre-1.0 breaking renames: E1M_* → ALP_E1M_*, single-arg alp_wdt_open(config), ADC read entry points carry _mv unit suffixes
v0.8.12026-06-24 · releasedShipped
Silicon-accuracy doc sweep — two SoM families now carry evidence
- README status: "Mostly pre-silicon" → "Partially silicon-verified" — V2N + AEN801 both carry silicon evidence
- cc3501e + gd32g553 headers: verification [UNTESTED] → [BENCH-VERIFIED], scoped to validated ops
- Wi-Fi + BLE concurrency held honest — conf-gated, not yet proven
- i.MX 93, V2M/DEEPX, and AEN30x–70x stay honestly [UNTESTED] on real hardware
v0.8.02026-06-24 · releasedShipped
E1M-AEN801 (Alif Ensemble E8) silicon bring-up · second verified SoM family
- First full E8 bench bring-up: 15/17 aen-* peripheral apps PASS on real silicon (2 PARTIAL, hardware-gated)
- Flow D (J-Link direct MRAM flash) is the default burn path on E8
- Ethernet end-to-end (DHCP lease) — DMA buffers moved off DTCM into global SRAM0
- Real person_detect NPU inference from MRAM slot0 on Ethos-U85 — RESULT PASS
- Dual-core HE↔HP: MHUv2 doorbell + shared-mem IPC 64/64 + OpenAMP RPMsg pingpong 16/16
- SE-CryptoCell AES/SHA/AEAD compute default-ON, bench-validated on E8
- cc3501e Wi-Fi/BLE bridge: hardware SS0 chip-select, real Wi-Fi + BLE scan, GPIO proxy
- ADC/DAC analog bench-confirmed (corrected VREF); CAN-FD, PDM mics, I²S TX all PASS
- clang-format pinned v14 → v22 (pip wheel); whole in-scope tree reformatted
v0.7.02026-06-12 · releasedShipped
Production Yocto image · per-core OS topology contract
- alp-image-prod production image + ALP distro identity — boots V2N from eMMC on the bench
- Hardening recipes: SSH hardening · watchdog policy · wired-DHCP network defaults
- U-Boot production boot + reproducible/traceable firmware banners (BL2 + U-Boot)
- CA55 1.8 GHz operating point — one-line opt-in (1.7 GHz stays default)
- V2N reboot hang + Mali GPU clock double-management fixed — clean reboot on silicon
- Per-core OS topology: alp_project.py --emit os-topology — OS is class-derived, not user-selectable
- system-manifest v1 pinned as the IDE/tool contract — west alp-build emits build/system-manifest.yaml
- Signed SoM-release bundles (ECDSA-P256) + provision_som.py + xspi_flashwriter backend
- <alp/update_log.h> experimental tamper-evident firmware-update audit log (SHA-256 hash-chain)
- act8760 + da9292 register maps verified against datasheets via v2n-brd-i2c-bringup diagnostic
- kernel FIT-signing build scaffolding (opt-in, default off)
v0.6.02026-06-06 · releasedShipped
Heterogeneous-OS orchestration · first silicon evidence on V2N
- V2N silicon campaign: GD32 supervisor bridge verified end-to-end — functional 26/26 · 20-row HIL soak 253/253 · analog loopback
- Wire protocol v0.7: negotiated STATUS_SEQ reply stamp kills the stale-reply hazard (fw v0.2.9)
- A/B OTA Path-A on the GD32 supervisor, verified on silicon
- AEN / i.MX 93 / V2M surfaces remain pre-HiL — see docs/verification-status.md
- board.yaml v2: per-core cores: block + cross-core ipc: carve-outs
- Flat schema: dropped "carrier" noun — boards via preset: or inline populated: / e1m_routes:
- Silicon facts (topology, memory_map, mailbox, helper firmware) live in SoM presets — out of your project
- 5 new west commands: alp-build · alp-image · alp-flash · alp-clean · alp-renode
- scripts/alp_orchestrate.py fans out one build slice per non-off core (+ --emit build-plan, ADR 0014)
- <alp/rpc.h> + auto-generated <alp/system_ipc.h> over OpenAMP RPMsg (Zephyr + Linux)
- storage: block — deterministic flash-partition allocator → DTS overlay + per-fs Kconfig
- security.psa: TF-M sysbuild emit on M55-HP TrustZone boundary (ADR 0013)
- ota.provider: dispatch — Mender / Hawkbit / MCUmgr on Zephyr; Mender on Yocto (ADR 0009 resolved)
- EEPROM-authoritative SoM hardware revision — ALP_ERR_NOT_PROVISIONED; ADC cross-check retired
- Cross-EVK portable examples: <alp/board.h> facade + BOARD_* aliases
- .alpmodel unified AI-model pipeline: Stage-1 + real-dxcom Stage-2 compile
- Intra-family portability proven — 21/21 E1M + 12/12 E1M-X swap-test cells (ADR 0011)
- Cross-platform dev host: Linux / macOS / Windows 11 native + WSL2 (ADR 0012)
- 8 vendor-SDK-style peripheral tutorials + portability cookbook + porting-new-som rewrite
v0.5.02026-04Shipped
Wave-2 DSP / power / 2D-accelerator surfaces
- <alp/dsp.h> standalone DSP-chain API (FIR/IIR/WINDOW/FFT) on CMSIS-DSP
- <alp/power.h> system-power-mode surface
- <alp/gpu2d.h> 2D-accelerator surface (AEN audit headline gap)
- alp_pwm_capture_t + alp_pwm_single_pulse advanced-timer extras
- alp_camera_configure_isp for Mali-C55 ISP toggles
- alp_storage_configure_inline_aes for AEN SecAES on OSPI/HexSPI
- CC3501E protocol bridge: 7 new opcodes, PROTOCOL_VERSION_MINOR 4→5
- HAL bodies pending — wave-2 opcodes return STATUS_NOSUPPORT until firmware ships
v0.4.02026-03 · prep mergedPreview
Yocto first-class · secure boot + OTA prep
- Yocto core-4 peripheral wrappers (I²C / SPI / UART / GPIO + IRQ dispatcher)
- Secure boot + secure OTA on AEN-Zephyr
- MQTT via libmosquitto
- lwrb + nanopb pinned behind the extras-v04 group
- Per-class override gates for custom carriers
- Failure-path ctest green — HW roundtrip still pending

§ Two ways to consume

Hand-written firmware, or generated from a GUI.
Both first-class.

The standalone path isn't a studio escape hatch — anything alp-studio can emit, you can write by hand against the same <alp/...> headers.

Standalone firmware

Hand-written C against `<alp/...>`

Write a Zephyr, Yocto, or bare-metal app directly. Pick instance IDs by hand from <alp/e1m_pinout.h> — ALP_E1M_I2C0, ALP_E1M_PWM3, and so on. Your app stays portable across every E1M-conformant SoM. Capability validation runs at runtime in*_open; alp_last_error() tells you why an open failed.

Firmware quickstart ↗

alp-studio codegen

GUI configurator that emits the same C

Studio reads block manifests, runs the pin allocator over the active SoM's manifest, and emits C that calls the same <alp/...> API the hand-written path uses. Pin-allocation correctness for free, with drop-in dropdowns for every MPN and board.

Open Alp Studio ↗

§ Get started

git clone https://github.com/alplabai/alp-sdk
cd alp-sdk
bash scripts/bootstrap.sh                    # west + Python + apt
export ZEPHYR_BASE="$PWD/../zephyrproject/zephyr"
bash scripts/test-all.sh                     # ctest + twister + format

Full docs at docs.alplab.ai ↗

§ Develop in VS Code

The Alp SDK extension brings LSP for board.yaml, west wrappers, flash + debug, an SDK manager, and a project wizard into your editor — no terminal jumping.

· Inline diagnostics, completion, hover, and quick-fixes on board.yaml
· New Project wizard — pick the SoM and SDK release, scaffold via the native alp CLI
· SDK Manager: install, link, and activate SDK releases per project — changelogs inline, active version in the status bar
· Command-palette wrappers for west validate / generate / build / flash / run
· Zephyr config, device tree overlays, CMake args, and Yocto config generated from alp_project.py
· Debug orchestration: inspection, doctor + preflight checks, support bundles

Get the extension ↗View on GitHub ↗

§ Examples

Real applications. Clone, build, run.

AI / Edge ML

E1M-X V2N, V2H

ai-camera-viewer

CSI camera → on-device inference → display preview. Smallest end-to-end vision loop.

One declarative file. Heterogeneous build.

The same board.yaml drives every E1M build.

Write once, run on any E1M module.

What just shipped.

Hand-written firmware, or generated from a GUI. Both first-class.

Hand-written C against <alp/...>

GUI configurator that emits the same C

§ Get started

§ Develop in VS Code

§ Examples

AI / Edge ML

Robotics

IoT

Display / HMI (LVGL)

Audio

Production & multi-processor

Peripherals (cross-family)

Hand-written firmware, or generated from a GUI.
Both first-class.

Hand-written C against `<alp/...>`